diff --git a/CHANGELOG.md b/CHANGELOG.md index 2428260..9433435 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -8,6 +8,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/). ## [Unreleased] - Simplify USB PA11/12 remapping for STM32F042x via `usb_bus.usb_remap()` function. +- Complete the `TscPin` trait implementation for all touch pins in the f0 family ## [v0.17.0] - 2020-06-27 diff --git a/src/tsc.rs b/src/tsc.rs index 3f03793..b0c890f 100644 --- a/src/tsc.rs +++ b/src/tsc.rs @@ -7,7 +7,7 @@ //! usually comprised between 47nF and 100nF. These values are given as reference for an //! electrode fitting a human finger tip size across a few millimeters dielectric panel. -use crate::gpio::{gpioa, gpiob, Alternate, AF3}; +use crate::gpio::*; use crate::pac::TSC; use crate::rcc::Rcc; @@ -66,12 +66,34 @@ tsc_pins!( gpioa::PA7> => (2_u8, 4_u8), ); +// all with a TSC minus 42 and 48 +#[cfg(any( + feature = "stm32f051", + feature = "stm32f058", + feature = "stm32f071", + feature = "stm32f072", + feature = "stm32f078", + feature = "stm32f091", + feature = "stm32f098" +))] +tsc_pins!( gpioc::PC5> => (3_u8, 1_u8) ); + tsc_pins!( gpiob::PB0> => (3_u8, 2_u8), gpiob::PB1> => (3_u8, 3_u8), - gpiob::PB2> => (3_u8, 4_u8), ); +// all with a TCS minus 58, 78 and 98 +#[cfg(any( + feature = "stm32f042", + feature = "stm32f048", + feature = "stm32f051", + feature = "stm32f071", + feature = "stm32f072", + feature = "stm32f091" +))] +tsc_pins!( gpiob::PB2> => (3_u8, 4_u8) ); + tsc_pins!( gpioa::PA9> => (4_u8, 1_u8), gpioa::PA10> => (4_u8, 2_u8), @@ -86,6 +108,53 @@ tsc_pins!( gpiob::PB7> => (5_u8, 4_u8), ); +// all with a TSC minus 42 and 48 +#[cfg(any( + feature = "stm32f051", + feature = "stm32f058", + feature = "stm32f071", + feature = "stm32f072", + feature = "stm32f078", + feature = "stm32f091", + feature = "stm32f098" +))] +tsc_pins!( + gpiob::PB11> => (6_u8, 1_u8), + gpiob::PB12> => (6_u8, 2_u8), + gpiob::PB13> => (6_u8, 3_u8), + gpiob::PB14> => (6_u8, 4_u8), +); + +// all with a TSC and gpioe +#[cfg(any( + feature = "stm32f071", + feature = "stm32f072", + feature = "stm32f078", + feature = "stm32f091", + feature = "stm32f098" +))] +tsc_pins!( + gpioe::PE2> => (7_u8, 1_u8), + gpioe::PE3> => (7_u8, 2_u8), + gpioe::PE4> => (7_u8, 3_u8), + gpioe::PE5> => (7_u8, 4_u8), +); + +// all with a TSC and gpiod +#[cfg(any( + feature = "stm32f071", + feature = "stm32f072", + feature = "stm32f078", + feature = "stm32f091", + feature = "stm32f098" +))] +tsc_pins!( + gpiod::PD12> => (8_u8, 1_u8), + gpiod::PD13> => (8_u8, 2_u8), + gpiod::PD14> => (8_u8, 3_u8), + gpiod::PD15> => (8_u8, 4_u8), +); + pub struct Tsc { tsc: TSC, }