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stm32f0xx-hal
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Add support for stm32f071

This commit is contained in:
Jesse Braham 2019-01-10 18:28:44 -08:00
parent b016ffdfe9
commit c4967c2645
8 changed files with 70 additions and 36 deletions
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1
Cargo.toml
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@ -57,6 +57,7 @@ stm32f051 = ["stm32f0/stm32f0x1", "device-selected"]
stm32f070 = ["stm32f0/stm32f0x0", "device-selected"]
stm32f070x6 = ["stm32f070"]
stm32f070xb = ["stm32f070"]
stm32f071 = ["stm32f0/stm32f0x1", "device-selected"]
stm32f072 = ["stm32f0/stm32f0x2", "device-selected"]
stm32f091 = ["stm32f0/stm32f0x1", "device-selected"]

4
src/adc.rs
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@ -208,6 +208,7 @@ adc_pins!(
feature = "stm32f030",
feature = "stm32f051",
feature = "stm32f070",
feature = "stm32f071",
feature = "stm32f072",
feature = "stm32f091"
))]
@ -355,6 +356,7 @@ impl VRef {
feature = "stm32f031",
feature = "stm32f042",
feature = "stm32f051",
feature = "stm32f071",
feature = "stm32f072",
feature = "stm32f091",
))]
@ -366,6 +368,7 @@ pub struct VBat;
feature = "stm32f031",
feature = "stm32f042",
feature = "stm32f051",
feature = "stm32f071",
feature = "stm32f072",
feature = "stm32f091",
))]
@ -377,6 +380,7 @@ adc_pins!(
feature = "stm32f031",
feature = "stm32f042",
feature = "stm32f051",
feature = "stm32f071",
feature = "stm32f072",
feature = "stm32f091",
))]

7
src/gpio.rs
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@ -572,6 +572,7 @@ gpio!(GPIOC, gpioc, iopcen, PC, [
feature = "stm32f030",
feature = "stm32f051",
feature = "stm32f070",
feature = "stm32f071",
feature = "stm32f072",
feature = "stm32f091",
))]
@ -599,7 +600,7 @@ gpio!(GPIOD, gpiod, iopden, PD, [
PD2: (pd2, 2, Input<Floating>),
]);
#[cfg(any(feature = "stm32f072", feature = "stm32f091"))]
#[cfg(any(feature = "stm32f071", feature = "stm32f072", feature = "stm32f091"))]
gpio!(GPIOD, gpiod, iopden, PD, [
PD0: (pd0, 0, Input<Floating>),
PD1: (pd1, 1, Input<Floating>),
@ -622,7 +623,7 @@ gpio!(GPIOD, gpiod, iopden, PD, [
// TODO: The ST SVD files are missing the entire PE enable register.
// Re-enable as soon as this gets fixed.
// #[cfg(any(feature = "stm32f072", feature = "stm32f091"))]
// #[cfg(any(feature = "stm32f071", feature = "stm32f072", feature = "stm32f091"))]
// gpio!(GPIOE, gpioe, iopeen, PE, [
// PE0: (pe0, 0, Input<Floating>),
// PE1: (pe1, 1, Input<Floating>),
@ -671,7 +672,7 @@ gpio!(GPIOF, gpiof, iopfen, PF, [
PF1: (pf1, 1, Input<Floating>),
]);
#[cfg(any(feature = "stm32f072", feature = "stm32f091"))]
#[cfg(any(feature = "stm32f071", feature = "stm32f072", feature = "stm32f091"))]
gpio!(GPIOF, gpiof, iopfen, PF, [
PF0: (pf0, 0, Input<Floating>),
PF1: (pf1, 1, Input<Floating>),

37
src/i2c.rs
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@ -33,11 +33,20 @@ macro_rules! i2c_pins {
}
}
#[cfg(any(feature = "stm32f030", feature = "stm32f042"))]
#[cfg(any(
feature = "stm32f030",
feature = "stm32f031",
feature = "stm32f042",
feature = "stm32f051",
feature = "stm32f070",
feature = "stm32f071",
feature = "stm32f072",
feature = "stm32f091",
))]
i2c_pins! {
I2C1 => {
scl => [gpioa::PA11<Alternate<AF5>>, gpiob::PB6<Alternate<AF1>>, gpiob::PB8<Alternate<AF1>>],
sda => [gpioa::PA12<Alternate<AF5>>, gpiob::PB7<Alternate<AF1>>, gpiob::PB9<Alternate<AF1>>],
scl => [gpiob::PB6<Alternate<AF1>>, gpiob::PB8<Alternate<AF1>>],
sda => [gpiob::PB7<Alternate<AF1>>, gpiob::PB9<Alternate<AF1>>],
}
}
#[cfg(any(
@ -53,6 +62,13 @@ i2c_pins! {
sda => [gpioa::PA10<Alternate<AF4>>],
}
}
#[cfg(any(feature = "stm32f030", feature = "stm32f042"))]
i2c_pins! {
I2C1 => {
scl => [gpioa::PA11<Alternate<AF5>>],
sda => [gpioa::PA12<Alternate<AF5>>],
}
}
#[cfg(any(feature = "stm32f031", feature = "stm32f042", feature = "stm32f030x6"))]
i2c_pins! {
I2C1 => {
@ -67,19 +83,6 @@ i2c_pins! {
sda => [gpiob::PB14<Alternate<AF5>>, gpiof::PF0<Alternate<AF1>>],
}
}
#[cfg(any(
feature = "stm32f031",
feature = "stm32f051",
feature = "stm32f070",
feature = "stm32f072",
feature = "stm32f091",
))]
i2c_pins! {
I2C1 => {
scl => [gpiob::PB6<Alternate<AF1>>, gpiob::PB8<Alternate<AF1>>],
sda => [gpiob::PB7<Alternate<AF1>>, gpiob::PB9<Alternate<AF1>>],
}
}
#[cfg(feature = "stm32f070x6")]
i2c_pins! {
I2C1 => {
@ -105,6 +108,7 @@ i2c_pins! {
#[cfg(any(
feature = "stm32f030xc",
feature = "stm32f070xb",
feature = "stm32f071",
feature = "stm32f072",
feature = "stm32f091",
))]
@ -159,6 +163,7 @@ i2c! {
feature = "stm32f030xc",
feature = "stm32f051",
feature = "stm32f070xb",
feature = "stm32f071",
feature = "stm32f072",
feature = "stm32f091",
))]

7
src/lib.rs
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@ -6,7 +6,12 @@ pub use stm32f0;
#[cfg(any(feature = "stm32f030", feature = "stm32f070"))]
pub use stm32f0::stm32f0x0 as stm32;
#[cfg(any(feature = "stm32f031", feature = "stm32f051", feature = "stm32f091"))]
#[cfg(any(
feature = "stm32f031",
feature = "stm32f051",
feature = "stm32f071",
feature = "stm32f091",
))]
pub use stm32f0::stm32f0x1 as stm32;
#[cfg(any(feature = "stm32f042", feature = "stm32f072"))]

18
src/serial.rs
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@ -85,7 +85,12 @@ macro_rules! usart_pins {
}
}
#[cfg(any(feature = "stm32f030", feature = "stm32f042", feature = "stm32f051"))]
#[cfg(any(
feature = "stm32f030",
feature = "stm32f042",
feature = "stm32f051",
feature = "stm32f071",
))]
usart_pins! {
USART1 => {
tx => [gpioa::PA9<Alternate<AF1>>, gpiob::PB6<Alternate<AF0>>],
@ -118,6 +123,7 @@ usart_pins! {
feature = "stm32f042",
feature = "stm32f051",
feature = "stm32f070",
feature = "stm32f071",
feature = "stm32f072",
feature = "stm32f091",
))]
@ -127,16 +133,18 @@ usart_pins! {
rx => [gpioa::PA3<Alternate<AF1>>, gpioa::PA15<Alternate<AF1>>],
}
}
#[cfg(any(feature = "stm32f072", feature = "stm32f091"))]
#[cfg(any(feature = "stm32f072", feature = "stm32f071", feature = "stm32f091"))]
usart_pins! {
USART2 => {
tx => [gpiod::PD5<Alternate<AF0>>],
rx => [gpiod::PD6<Alternate<AF0>>],
}
}
#[cfg(any(
feature = "stm32f030xc",
feature = "stm32f070xb",
feature = "stm32f071",
feature = "stm32f072",
feature = "stm32f091",
))]
@ -151,13 +159,14 @@ usart_pins! {
rx => [gpioa::PA1<Alternate<AF4>>, gpioc::PC11<Alternate<AF0>>],
}
}
#[cfg(any(feature = "stm32f072", feature = "stm32f091"))]
#[cfg(any(feature = "stm32f071", feature = "stm32f072", feature = "stm32f091"))]
usart_pins! {
USART3 => {
tx => [gpiod::PD8<Alternate<AF0>>],
rx => [gpiod::PD9<Alternate<AF0>>],
}
}
// TODO: The ST SVD files are missing the entire PE enable register.
// Re-enable as soon as this gets fixed.
// #[cfg(feature = "stm32f091")]
@ -167,6 +176,7 @@ usart_pins! {
// rx => [gpioe::PE9<Alternate<AF1>>],
// }
// }
#[cfg(any(feature = "stm32f030xc", feature = "stm32f091"))]
usart_pins! {
USART5 => {
@ -287,6 +297,7 @@ usart! {
feature = "stm32f042",
feature = "stm32f051",
feature = "stm32f070",
feature = "stm32f071",
feature = "stm32f072",
feature = "stm32f091",
))]
@ -296,6 +307,7 @@ usart! {
#[cfg(any(
feature = "stm32f030xc",
feature = "stm32f070xb",
feature = "stm32f071",
feature = "stm32f072",
feature = "stm32f091",
))]

8
src/spi.rs
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@ -50,6 +50,7 @@ use crate::stm32::SPI1;
feature = "stm32f030x8",
feature = "stm32f030xc",
feature = "stm32f070xb",
feature = "stm32f071",
feature = "stm32f091",
))]
use crate::stm32::SPI2;
@ -121,7 +122,7 @@ spi_pins! {
// TODO: The ST SVD files are missing the entire PE enable register.
// So those pins do not exist in the register definitions.
// Re-enable as soon as this gets fixed.
// #[cfg(any(feature = "stm32f072", feature = "stm32f091"))]
// #[cfg(any(feature = "stm32f071", feature = "stm32f072", feature = "stm32f091"))]
// spi_pins! {
// SPI1 => {
// sck => [gpioe::PE13<Alternate<AF1>>],
@ -135,6 +136,7 @@ spi_pins! {
feature = "stm32f030xc",
feature = "stm32f051",
feature = "stm32f070xb",
feature = "stm32f071",
feature = "stm32f072",
feature = "stm32f091",
))]
@ -148,6 +150,7 @@ spi_pins! {
#[cfg(any(
feature = "stm32f030xc",
feature = "stm32f070xb",
feature = "stm32f071",
feature = "stm32f072",
feature = "stm32f091",
))]
@ -158,7 +161,7 @@ spi_pins! {
mosi => [gpioc::PC3<Alternate<AF1>>],
}
}
#[cfg(any(feature = "stm32f072", feature = "stm32f091"))]
#[cfg(any(feature = "stm32f071", feature = "stm32f072", feature = "stm32f091"))]
spi_pins! {
SPI2 => {
sck => [gpiod::PD1<Alternate<AF1>>],
@ -207,6 +210,7 @@ spi! {
feature = "stm32f030xc",
feature = "stm32f051",
feature = "stm32f070xb",
feature = "stm32f071",
feature = "stm32f091",
))]
spi! {

24
src/timers.rs
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@ -222,11 +222,24 @@ timers! {
TIM17: (tim17, tim17en, tim17rst, apb2enr, apb2rstr),
}
#[cfg(any(
feature = "stm32f031",
feature = "stm32f042",
feature = "stm32f051",
feature = "stm32f071",
feature = "stm32f072",
feature = "stm32f091",
))]
timers! {
TIM2: (tim2, tim2en, tim2rst, apb1enr, apb1rstr),
}
#[cfg(any(
feature = "stm32f030x8",
feature = "stm32f030xc",
feature = "stm32f051",
feature = "stm32f070xb",
feature = "stm32f071",
feature = "stm32f072",
feature = "stm32f091",
))]
@ -244,14 +257,3 @@ timers! {
timers! {
TIM7: (tim7, tim7en, tim7rst, apb1enr, apb1rstr),
}
#[cfg(any(
feature = "stm32f031",
feature = "stm32f042",
feature = "stm32f051",
feature = "stm32f072",
feature = "stm32f091",
))]
timers! {
TIM2: (tim2, tim2en, tim2rst, apb1enr, apb1rstr),
}