From fca47168d2d4d400a7e2197c972a354df928198e Mon Sep 17 00:00:00 2001
From: Jesse Braham <jesse@beta7.io>
Date: Sun, 13 Jan 2019 20:32:54 -0800
Subject: [PATCH] Add support for stm32f078

---
 Cargo.toml    |  1 +
 src/adc.rs    |  6 +++++-
 src/gpio.rs   | 22 +++++++++++++++++++---
 src/i2c.rs    |  3 +++
 src/lib.rs    |  7 ++++++-
 src/serial.rs | 19 +++++++++++++++++--
 src/spi.rs    | 18 ++++++++++++++++--
 src/timers.rs |  3 +++
 8 files changed, 70 insertions(+), 9 deletions(-)

diff --git a/Cargo.toml b/Cargo.toml
index 44c2ce9..24b4591 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -65,6 +65,7 @@ stm32f070x6 = ["stm32f070"]
 stm32f070xb = ["stm32f070"]
 stm32f071 = ["stm32f0/stm32f0x1", "device-selected"]
 stm32f072 = ["stm32f0/stm32f0x2", "device-selected"]
+stm32f078 = ["stm32f0/stm32f0x8", "device-selected"]
 stm32f091 = ["stm32f0/stm32f0x1", "device-selected"]
 
 [profile.dev]
diff --git a/src/adc.rs b/src/adc.rs
index 1d155d7..9531d3b 100644
--- a/src/adc.rs
+++ b/src/adc.rs
@@ -211,7 +211,8 @@ adc_pins!(
     feature = "stm32f070",
     feature = "stm32f071",
     feature = "stm32f072",
-    feature = "stm32f091"
+    feature = "stm32f078",
+    feature = "stm32f091",
 ))]
 adc_pins!(
     gpioc::PC0<Analog> => 10_u8,
@@ -362,6 +363,7 @@ impl VRef {
     feature = "stm32f058",
     feature = "stm32f071",
     feature = "stm32f072",
+    feature = "stm32f078",
     feature = "stm32f091",
 ))]
 #[derive(Debug, Default)]
@@ -377,6 +379,7 @@ pub struct VBat;
     feature = "stm32f058",
     feature = "stm32f071",
     feature = "stm32f072",
+    feature = "stm32f078",
     feature = "stm32f091",
 ))]
 adc_pins!(
@@ -392,6 +395,7 @@ adc_pins!(
     feature = "stm32f058",
     feature = "stm32f071",
     feature = "stm32f072",
+    feature = "stm32f078",
     feature = "stm32f091",
 ))]
 impl VBat {
diff --git a/src/gpio.rs b/src/gpio.rs
index b3c688b..8d292a2 100644
--- a/src/gpio.rs
+++ b/src/gpio.rs
@@ -574,6 +574,7 @@ gpio!(GPIOC, gpioc, iopcen, PC, [
     feature = "stm32f070",
     feature = "stm32f071",
     feature = "stm32f072",
+    feature = "stm32f078",
     feature = "stm32f091",
 ))]
 gpio!(GPIOC, gpioc, iopcen, PC, [
@@ -604,7 +605,12 @@ gpio!(GPIOC, gpioc, iopcen, PC, [
 gpio!(GPIOD, gpiod, iopden, PD, [
     PD2: (pd2, 2, Input<Floating>),
 ]);
-#[cfg(any(feature = "stm32f071", feature = "stm32f072", feature = "stm32f091"))]
+#[cfg(any(
+    feature = "stm32f071",
+    feature = "stm32f072",
+    feature = "stm32f078",
+    feature = "stm32f091"
+))]
 gpio!(GPIOD, gpiod, iopden, PD, [
     PD0: (pd0, 0, Input<Floating>),
     PD1: (pd1, 1, Input<Floating>),
@@ -627,7 +633,12 @@ gpio!(GPIOD, gpiod, iopden, PD, [
 // TODO: The ST SVD files are missing the entire PE enable register.
 //       Re-enable as soon as this gets fixed.
 
-// #[cfg(any(feature = "stm32f071", feature = "stm32f072", feature = "stm32f091"))]
+// #[cfg(any(
+//     feature = "stm32f071",
+//     feature = "stm32f072",
+//     feature = "stm32f078",
+//     feature = "stm32f091",
+// ))]
 // gpio!(GPIOE, gpioe, iopeen, PE, [
 //     PE0: (pe0, 0, Input<Floating>),
 //     PE1: (pe1, 1, Input<Floating>),
@@ -684,7 +695,12 @@ gpio!(GPIOF, gpiof, iopfen, PF, [
     PF1: (pf1, 1, Input<Floating>),
 ]);
 
-#[cfg(any(feature = "stm32f071", feature = "stm32f072", feature = "stm32f091"))]
+#[cfg(any(
+    feature = "stm32f071",
+    feature = "stm32f072",
+    feature = "stm32f078",
+    feature = "stm32f091",
+))]
 gpio!(GPIOF, gpiof, iopfen, PF, [
     PF0: (pf0, 0, Input<Floating>),
     PF1: (pf1, 1, Input<Floating>),
diff --git a/src/i2c.rs b/src/i2c.rs
index 6fd10bf..382345b 100644
--- a/src/i2c.rs
+++ b/src/i2c.rs
@@ -44,6 +44,7 @@ macro_rules! i2c_pins {
     feature = "stm32f070",
     feature = "stm32f071",
     feature = "stm32f072",
+    feature = "stm32f078",
     feature = "stm32f091",
 ))]
 i2c_pins! {
@@ -127,6 +128,7 @@ i2c_pins! {
     feature = "stm32f070xb",
     feature = "stm32f071",
     feature = "stm32f072",
+    feature = "stm32f078",
     feature = "stm32f091",
 ))]
 i2c_pins! {
@@ -183,6 +185,7 @@ i2c! {
     feature = "stm32f070xb",
     feature = "stm32f071",
     feature = "stm32f072",
+    feature = "stm32f078",
     feature = "stm32f091",
 ))]
 i2c! {
diff --git a/src/lib.rs b/src/lib.rs
index 90174c2..51d5e0f 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -17,7 +17,12 @@ pub use stm32f0::stm32f0x1 as stm32;
 #[cfg(any(feature = "stm32f042", feature = "stm32f072"))]
 pub use stm32f0::stm32f0x2 as stm32;
 
-#[cfg(any(feature = "stm32f038", feature = "stm32f048", feature = "stm32f058"))]
+#[cfg(any(
+    feature = "stm32f038",
+    feature = "stm32f048",
+    feature = "stm32f058",
+    feature = "stm32f078"
+))]
 pub use stm32f0::stm32f0x8 as stm32;
 
 #[cfg(feature = "device-selected")]
diff --git a/src/serial.rs b/src/serial.rs
index c0dc52b..52eda7c 100644
--- a/src/serial.rs
+++ b/src/serial.rs
@@ -121,6 +121,7 @@ macro_rules! usart_pins {
     feature = "stm32f051",
     feature = "stm32f058",
     feature = "stm32f071",
+    feature = "stm32f078",
 ))]
 usart_pins! {
     USART1 =>  {
@@ -159,6 +160,7 @@ usart_pins! {
     feature = "stm32f070",
     feature = "stm32f071",
     feature = "stm32f072",
+    feature = "stm32f078",
     feature = "stm32f091",
 ))]
 usart_pins! {
@@ -167,7 +169,12 @@ usart_pins! {
         rx => [gpioa::PA3<Alternate<AF1>>, gpioa::PA15<Alternate<AF1>>],
     }
 }
-#[cfg(any(feature = "stm32f072", feature = "stm32f071", feature = "stm32f091"))]
+#[cfg(any(
+    feature = "stm32f072",
+    feature = "stm32f071",
+    feature = "stm32f078",
+    feature = "stm32f091"
+))]
 usart_pins! {
     USART2 => {
         tx => [gpiod::PD5<Alternate<AF0>>],
@@ -180,6 +187,7 @@ usart_pins! {
     feature = "stm32f070xb",
     feature = "stm32f071",
     feature = "stm32f072",
+    feature = "stm32f078",
     feature = "stm32f091",
 ))]
 usart_pins! {
@@ -193,7 +201,12 @@ usart_pins! {
         rx => [gpioa::PA1<Alternate<AF4>>, gpioc::PC11<Alternate<AF0>>],
     }
 }
-#[cfg(any(feature = "stm32f071", feature = "stm32f072", feature = "stm32f091"))]
+#[cfg(any(
+    feature = "stm32f071",
+    feature = "stm32f072",
+    feature = "stm32f078",
+    feature = "stm32f091",
+))]
 usart_pins! {
     USART3 => {
         tx => [gpiod::PD8<Alternate<AF0>>],
@@ -376,6 +389,7 @@ usart! {
     feature = "stm32f070",
     feature = "stm32f071",
     feature = "stm32f072",
+    feature = "stm32f078",
     feature = "stm32f091",
 ))]
 usart! {
@@ -386,6 +400,7 @@ usart! {
     feature = "stm32f070xb",
     feature = "stm32f071",
     feature = "stm32f072",
+    feature = "stm32f078",
     feature = "stm32f091",
 ))]
 usart! {
diff --git a/src/spi.rs b/src/spi.rs
index 2a576ef..5de57fc 100644
--- a/src/spi.rs
+++ b/src/spi.rs
@@ -54,6 +54,7 @@ use crate::stm32::SPI1;
     feature = "stm32f058",
     feature = "stm32f070xb",
     feature = "stm32f071",
+    feature = "stm32f078",
     feature = "stm32f091",
 ))]
 use crate::stm32::SPI2;
@@ -125,7 +126,12 @@ spi_pins! {
 // TODO: The ST SVD files are missing the entire PE enable register.
 //       So those pins do not exist in the register definitions.
 //       Re-enable as soon as this gets fixed.
-// #[cfg(any(feature = "stm32f071", feature = "stm32f072", feature = "stm32f091"))]
+// #[cfg(any(
+//     feature = "stm32f071",
+//     feature = "stm32f072",
+//     feature = "stm32f078",
+//     feature = "stm32f091"
+// ))]
 // spi_pins! {
 //     SPI1 => {
 //         sck => [gpioe::PE13<Alternate<AF1>>],
@@ -143,6 +149,7 @@ spi_pins! {
     feature = "stm32f070xb",
     feature = "stm32f071",
     feature = "stm32f072",
+    feature = "stm32f078",
     feature = "stm32f091",
 ))]
 spi_pins! {
@@ -157,6 +164,7 @@ spi_pins! {
     feature = "stm32f070xb",
     feature = "stm32f071",
     feature = "stm32f072",
+    feature = "stm32f078",
     feature = "stm32f091",
 ))]
 spi_pins! {
@@ -166,7 +174,12 @@ spi_pins! {
         mosi => [gpioc::PC3<Alternate<AF1>>],
     }
 }
-#[cfg(any(feature = "stm32f071", feature = "stm32f072", feature = "stm32f091"))]
+#[cfg(any(
+    feature = "stm32f071",
+    feature = "stm32f072",
+    feature = "stm32f078",
+    feature = "stm32f091",
+))]
 spi_pins! {
     SPI2 => {
         sck => [gpiod::PD1<Alternate<AF1>>],
@@ -218,6 +231,7 @@ spi! {
     feature = "stm32f058",
     feature = "stm32f070xb",
     feature = "stm32f071",
+    feature = "stm32f078",
     feature = "stm32f091",
 ))]
 spi! {
diff --git a/src/timers.rs b/src/timers.rs
index 2a1844f..26fbaf6 100644
--- a/src/timers.rs
+++ b/src/timers.rs
@@ -231,6 +231,7 @@ timers! {
     feature = "stm32f058",
     feature = "stm32f071",
     feature = "stm32f072",
+    feature = "stm32f078",
     feature = "stm32f091",
 ))]
 timers! {
@@ -245,6 +246,7 @@ timers! {
     feature = "stm32f070xb",
     feature = "stm32f071",
     feature = "stm32f072",
+    feature = "stm32f078",
     feature = "stm32f091",
 ))]
 timers! {
@@ -256,6 +258,7 @@ timers! {
     feature = "stm32f030xc",
     feature = "stm32f070xb",
     feature = "stm32f072",
+    feature = "stm32f078",
     feature = "stm32f091",
 ))]
 timers! {