From ff1cea2829fc38feb2d427850705919c8109add6 Mon Sep 17 00:00:00 2001
From: Daniel Egger <daniel@eggers-club.de>
Date: Sat, 17 Aug 2019 17:06:35 +0200
Subject: [PATCH] Enable commented out GPIOE support which now works

Signed-off-by: Daniel Egger <daniel@eggers-club.de>
---
 CHANGELOG.md |  1 +
 src/gpio.rs  | 52 +++++++++++++++++++++++++---------------------------
 2 files changed, 26 insertions(+), 27 deletions(-)

diff --git a/CHANGELOG.md b/CHANGELOG.md
index 48ad357..dee0c6d 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -9,6 +9,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ### Changed
 
+- Enabled commented out and now available GPIOE support for 07x and 09x families
 - Extract register block address only once
 
 ## [v0.15.1] - 2019-08-11
diff --git a/src/gpio.rs b/src/gpio.rs
index 65081d2..c7842e0 100644
--- a/src/gpio.rs
+++ b/src/gpio.rs
@@ -656,33 +656,31 @@ gpio!(GPIOD, gpiod, iopden, PD, [
     PD15: (pd15, 15, Input<Floating>),
 ]);
 
-// TODO: The ST SVD files are missing the entire PE enable register.
-//       Re-enable as soon as this gets fixed.
-// #[cfg(any(
-//     feature = "stm32f071",
-//     feature = "stm32f072",
-//     feature = "stm32f078",
-//     feature = "stm32f091",
-//     feature = "stm32f098",
-// ))]
-// gpio!(GPIOE, gpioe, iopeen, PE, [
-//     PE0: (pe0, 0, Input<Floating>),
-//     PE1: (pe1, 1, Input<Floating>),
-//     PE2: (pe2, 2, Input<Floating>),
-//     PE3: (pe3, 3, Input<Floating>),
-//     PE4: (pe4, 4, Input<Floating>),
-//     PE5: (pe5, 5, Input<Floating>),
-//     PE6: (pe6, 6, Input<Floating>),
-//     PE7: (pe7, 7, Input<Floating>),
-//     PE8: (pe8, 8, Input<Floating>),
-//     PE9: (pe9, 9, Input<Floating>),
-//     PE10: (pe10, 10, Input<Floating>),
-//     PE11: (pe11, 11, Input<Floating>),
-//     PE12: (pe12, 12, Input<Floating>),
-//     PE13: (pe13, 13, Input<Floating>),
-//     PE14: (pe14, 14, Input<Floating>),
-//     PE15: (pe15, 15, Input<Floating>),
-// ]);
+#[cfg(any(
+    feature = "stm32f071",
+    feature = "stm32f072",
+    feature = "stm32f078",
+    feature = "stm32f091",
+    feature = "stm32f098",
+))]
+gpio!(GPIOE, gpioe, iopeen, PE, [
+    PE0: (pe0, 0, Input<Floating>),
+    PE1: (pe1, 1, Input<Floating>),
+    PE2: (pe2, 2, Input<Floating>),
+    PE3: (pe3, 3, Input<Floating>),
+    PE4: (pe4, 4, Input<Floating>),
+    PE5: (pe5, 5, Input<Floating>),
+    PE6: (pe6, 6, Input<Floating>),
+    PE7: (pe7, 7, Input<Floating>),
+    PE8: (pe8, 8, Input<Floating>),
+    PE9: (pe9, 9, Input<Floating>),
+    PE10: (pe10, 10, Input<Floating>),
+    PE11: (pe11, 11, Input<Floating>),
+    PE12: (pe12, 12, Input<Floating>),
+    PE13: (pe13, 13, Input<Floating>),
+    PE14: (pe14, 14, Input<Floating>),
+    PE15: (pe15, 15, Input<Floating>),
+]);
 
 #[cfg(any(
     feature = "stm32f030x4",