Merge #120

120: implement TscPin for remaining touch pins r=therealprof a=evils

some touch pins were missing the TscPin trait

Co-authored-by: Evils <evils.devils@protonmail.com>

CHANGELOG.md

@@ -7,14 +7,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ## [Unreleased]
 
-## [v0.17.1] - 2020-08-30
-
-### Changed
-
 - Simplify USB PA11/12 remapping for STM32F042x via `usb_bus.usb_remap()` function.
-
-### Added
-
 - Complete the `TscPin` trait implementation for all touch pins in the f0 family
 
 ## [v0.17.0] - 2020-06-27
@@ -214,8 +207,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 - Updated stm32f0 dependency to v0.5.0.
 - Interrupt handler to new #[interrupt] attribute
 
-[Unreleased]: https://github.com/stm32-rs/stm32f0xx-hal/compare/v0.17.1...HEAD
-[v0.17.1]: https://github.com/stm32-rs/stm32f0xx-hal/compare/v0.17.0...v0.17.1
+[Unreleased]: https://github.com/stm32-rs/stm32f0xx-hal/compare/v0.17.0...HEAD
 [v0.17.0]: https://github.com/stm32-rs/stm32f0xx-hal/compare/v0.16.0...v0.17.0
 [v0.16.0]: https://github.com/stm32-rs/stm32f0xx-hal/compare/v0.15.2...v0.16.0
 [v0.15.2]: https://github.com/stm32-rs/stm32f0xx-hal/compare/v0.15.1...v0.15.2

Cargo.toml

@@ -23,27 +23,27 @@ license = "0BSD"
 name = "stm32f0xx-hal"
 readme = "README.md"
 repository = "https://github.com/stm32-rs/stm32f0xx-hal"
-version = "0.17.1"
+version = "0.17.0"
 
 [package.metadata.docs.rs]
 features = ["stm32f042", "rt", "stm32-usbd"]
 targets = ["thumbv6m-none-eabi"]
 
 [dependencies]
-bare-metal = { version = "1.0.0" }
+bare-metal = { version = "0.2", features = ["const-fn"] }
 cast = { version = "0.2", default-features = false }
 cortex-m = "0.6"
 embedded-hal = { version = "0.2", features = ["unproven"] }
-stm32f0 = "0.12.1"
-nb = "1.0"
+stm32f0 = "0.11"
+nb = "0.1"
 void = { version = "1.0", default-features = false }
-stm32-usbd = { version = "0.5.1", features = ["ram_access_2x16"], optional = true }
+stm32-usbd = { version = "0.5.0", features = ["ram_access_2x16"], optional = true }
 
 [dev-dependencies]
 cortex-m-rt = "0.6"
 panic-halt = "0.2"
-usb-device = "0.2.7"
-usbd-serial = "0.1.1"
+usb-device = "0.2.3"
+usbd-serial = "0.1.0"
 
 [features]
 device-selected = []

src/spi.rs

@@ -365,27 +365,17 @@ where
     fn check_read(&mut self) -> nb::Result<(), Error> {
         let sr = self.spi.sr.read();
 
-        self.check_errors()?;
-
-        if !sr.rxne().bit_is_set() {
-            Err(nb::Error::WouldBlock)
-        } else {
-            Ok(())
-        }
-    }
-
-    fn check_errors(&mut self) -> Result<(), Error> {
-        let sr = self.spi.sr.read();
-
-        if sr.ovr().bit_is_set() {
-            Err(Error::Overrun)
+        Err(if sr.ovr().bit_is_set() {
+            nb::Error::Other(Error::Overrun)
         } else if sr.modf().bit_is_set() {
-            Err(Error::ModeFault)
+            nb::Error::Other(Error::ModeFault)
         } else if sr.crcerr().bit_is_set() {
-            Err(Error::Crc)
+            nb::Error::Other(Error::Crc)
+        } else if sr.rxne().bit_is_set() {
+            return Ok(());
         } else {
-            Ok(())
-        }
+            nb::Error::WouldBlock
+        })
     }
 
     fn send_buffer_size(&mut self) -> u8 {
@@ -404,13 +394,17 @@ where
     fn check_send(&mut self) -> nb::Result<(), Error> {
         let sr = self.spi.sr.read();
 
-        self.check_errors()?;
-
-        if !sr.txe().bit_is_set() {
-            Err(nb::Error::WouldBlock)
+        Err(if sr.ovr().bit_is_set() {
+            nb::Error::Other(Error::Overrun)
+        } else if sr.modf().bit_is_set() {
+            nb::Error::Other(Error::ModeFault)
+        } else if sr.crcerr().bit_is_set() {
+            nb::Error::Other(Error::Crc)
+        } else if sr.txe().bit_is_set() {
+            return Ok(());
         } else {
-            Ok(())
-        }
+            nb::Error::WouldBlock
+        })
     }
 
     fn read_u8(&mut self) -> u8 {
@@ -460,29 +454,6 @@ where
     }
 }
 
-impl<SPI, SCKPIN, MISOPIN, MOSIPIN> ::embedded_hal::spi::FullDuplex<u8>
-    for Spi<SPI, SCKPIN, MISOPIN, MOSIPIN, EightBit>
-where
-    SPI: Deref<Target = SpiRegisterBlock>,
-{
-    type Error = Error;
-
-    fn read(&mut self) -> nb::Result<u8, Error> {
-        self.check_read()?;
-        Ok(self.read_u8())
-    }
-
-    fn send(&mut self, byte: u8) -> nb::Result<(), Error> {
-        // We want to transfer bidirectionally, make sure we're in the correct mode
-        self.set_bidi();
-
-        self.check_send()?;
-        self.send_u8(byte);
-
-        self.check_errors().map_err(|e| nb::Error::Other(e))
-    }
-}
-
 impl<SPI, SCKPIN, MISOPIN, MOSIPIN> ::embedded_hal::blocking::spi::Write<u8>
     for Spi<SPI, SCKPIN, MISOPIN, MOSIPIN, EightBit>
 where
@@ -511,33 +482,8 @@ where
         }
 
         // Do one last status register check before continuing
-        self.check_errors()
-    }
-}
-
-impl<SPI, SCKPIN, MISOPIN, MOSIPIN> ::embedded_hal::spi::FullDuplex<u16>
-    for Spi<SPI, SCKPIN, MISOPIN, MOSIPIN, SixteenBit>
-where
-    SPI: Deref<Target = SpiRegisterBlock>,
-{
-    type Error = Error;
-
-    fn read(&mut self) -> nb::Result<u16, Error> {
-        self.check_read()?;
-        Ok(self.read_u16())
-    }
-
-    fn send(&mut self, byte: u16) -> nb::Result<(), Error> {
-        // We want to transfer bidirectionally, make sure we're in the correct mode
-        self.set_bidi();
-
-        self.check_send()?;
-        self.send_u16(byte);
-
-        match self.check_errors() {
-            Ok(_) => Ok(()),
-            Err(e) => Err(nb::Error::Other(e)),
-        }
+        self.check_send().ok();
+        Ok(())
     }
 }
 
@@ -580,6 +526,7 @@ where
         }
 
         // Do one last status register check before continuing
-        self.check_errors()
+        self.check_send().ok();
+        Ok(())
     }
 }