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362 lines
10 KiB
Rust
362 lines
10 KiB
Rust
//! API for the integrated USART ports
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//!
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//! This only implements the usual asynchronous bidirectional 8-bit transfers, everything else is missing
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//!
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//! # Example
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//! Serial Echo
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//! ``` no_run
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//! use stm32f0xx_hal as hal;
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//!
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//! use crate::hal::stm32;
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//! use crate::hal::prelude::*;
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//! use crate::hal::serial::Serial;
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//! use nb::block;
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//!
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//! let mut p = stm32::Peripherals::take().unwrap();
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//!
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//! let mut led = gpioa.pa1.into_push_pull_pull_output();
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//! let rcc = p.RCC.constrain().cfgr.freeze();
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//! let mut timer = Timer::tim1(p.TIM1, Hertz(1), clocks);
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//! loop {
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//! led.toggle();
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//! block!(timer.wait()).ok();
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//! }
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//! ```
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#[allow(unused)]
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use core::{
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fmt::{Result, Write},
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ops::Deref,
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ptr,
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};
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#[allow(unused)]
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use embedded_hal::prelude::*;
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#[allow(unused)]
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use crate::{gpio::*, rcc::Clocks, time::Bps};
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/// Serial error
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#[derive(Debug)]
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pub enum Error {
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/// Framing error
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Framing,
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/// Noise error
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Noise,
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/// RX buffer overrun
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Overrun,
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/// Parity check error
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Parity,
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#[doc(hidden)]
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_Extensible,
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}
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/// Interrupt event
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pub enum Event {
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/// New data has been received
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Rxne,
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/// New data can be sent
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Txe,
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/// Idle line state detected
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Idle,
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}
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pub trait TxPin<USART> {}
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pub trait RxPin<USART> {}
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#[cfg(feature = "device-selected")]
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macro_rules! usart_pins {
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($($USART:ident => {
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tx => [$($tx:ty),+ $(,)*],
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rx => [$($rx:ty),+ $(,)*],
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})+) => {
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$(
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$(
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impl TxPin<crate::stm32::$USART> for $tx {}
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)+
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$(
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impl RxPin<crate::stm32::$USART> for $rx {}
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)+
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)+
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}
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}
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#[cfg(any(feature = "stm32f030", feature = "stm32f042"))]
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usart_pins! {
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USART1 => {
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tx => [gpioa::PA9<Alternate<AF1>>, gpiob::PB6<Alternate<AF0>>],
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rx => [gpioa::PA10<Alternate<AF1>>, gpiob::PB6<Alternate<AF0>>],
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}
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}
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#[cfg(feature = "stm32f030x6")]
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usart_pins! {
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USART1 => {
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tx => [gpioa::PA2<Alternate<AF1>>, gpioa::PA14<Alternate<AF1>>],
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rx => [gpioa::PA3<Alternate<AF1>>, gpioa::PA15<Alternate<AF1>>],
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}
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}
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#[cfg(feature = "stm32f070")]
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usart_pins! {
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USART1 => {
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tx => [gpioa::PA9<Alternate<AF1>>, gpiob::PB6<Alternate<AF0>>],
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rx => [gpioa::PA10<Alternate<AF1>>, gpiob::PB7<Alternate<AF0>>],
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}
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}
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#[cfg(any(
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feature = "stm32f030x8",
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feature = "stm32f030xc",
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feature = "stm32f042",
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feature = "stm32f070",
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))]
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usart_pins! {
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USART2 => {
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tx => [gpioa::PA2<Alternate<AF1>>, gpioa::PA14<Alternate<AF1>>],
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rx => [gpioa::PA3<Alternate<AF1>>, gpioa::PA15<Alternate<AF1>>],
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}
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}
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#[cfg(any(feature = "stm32f030xc", feature = "stm32f070xb"))]
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usart_pins! {
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USART3 => {
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// According to the datasheet PB10 is both tx and rx, but in stm32cubemx it's only tx
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tx => [gpiob::PB10<Alternate<AF4>>, gpioc::PC4<Alternate<AF1>>, gpioc::PC10<Alternate<AF1>>],
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rx => [gpiob::PB11<Alternate<AF4>>, gpioc::PC5<Alternate<AF1>>, gpioc::PC11<Alternate<AF1>>],
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}
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USART4 => {
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tx => [gpioa::PA0<Alternate<AF4>>, gpioc::PC10<Alternate<AF0>>],
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rx => [gpioa::PA1<Alternate<AF4>>, gpioc::PC11<Alternate<AF0>>],
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}
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}
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#[cfg(feature = "stm32f030xc")]
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usart_pins! {
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USART5 => {
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tx => [gpiob::PB3<Alternate<AF4>>, gpioc::PC12<Alternate<AF2>>],
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rx => [gpiob::PB4<Alternate<AF4>>, gpiod::PD2<Alternate<AF2>>],
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}
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USART6 => {
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tx => [gpioa::PA4<Alternate<AF5>>, gpioc::PC0<Alternate<AF2>>],
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rx => [gpioa::PA5<Alternate<AF5>>, gpioc::PC1<Alternate<AF2>>],
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}
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}
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/// Serial abstraction
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#[allow(unused)]
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pub struct Serial<USART, TXPIN, RXPIN> {
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usart: USART,
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pins: (TXPIN, RXPIN),
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}
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/// Serial receiver
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#[allow(unused)]
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pub struct Rx<USART> {
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// This is ok, because the USART types only contains PhantomData
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usart: *const USART,
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}
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// NOTE(unsafe) Required to allow protected shared access in handlers
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unsafe impl<USART> Send for Rx<USART> {}
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/// Serial transmitter
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#[allow(unused)]
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pub struct Tx<USART> {
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// This is ok, because the USART types only contains PhantomData
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usart: *const USART,
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}
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// NOTE(unsafe) Required to allow protected shared access in handlers
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unsafe impl<USART> Send for Tx<USART> {}
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#[cfg(feature = "device-selected")]
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macro_rules! usart {
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($($USART:ident: ($usart:ident, $usartXen:ident, $apbenr:ident),)+) => {
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$(
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use crate::stm32::$USART;
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impl<TXPIN, RXPIN> Serial<$USART, TXPIN, RXPIN> {
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/// Creates a new serial instance
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pub fn $usart(usart: $USART, pins: (TXPIN, RXPIN), baud_rate: Bps, clocks: Clocks) -> Self
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where
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TXPIN: TxPin<$USART>,
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RXPIN: RxPin<$USART>,
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{
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// NOTE(unsafe) This executes only during initialisation
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let rcc = unsafe { &(*crate::stm32::RCC::ptr()) };
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// Enable clock for USART
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rcc.$apbenr.modify(|_, w| w.$usartXen().set_bit());
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// Calculate correct baudrate divisor on the fly
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let brr = clocks.pclk().0 / baud_rate.0;
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usart.brr.write(|w| unsafe { w.bits(brr) });
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// Reset other registers to disable advanced USART features
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usart.cr2.reset();
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usart.cr3.reset();
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// Enable transmission and receiving
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usart.cr1.modify(|_, w| w.te().set_bit().re().set_bit().ue().set_bit());
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Serial { usart, pins }
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}
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/// Starts listening for an interrupt event
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pub fn listen(&mut self, event: Event) {
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match event {
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Event::Rxne => {
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self.usart.cr1.modify(|_, w| w.rxneie().set_bit())
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},
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Event::Txe => {
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self.usart.cr1.modify(|_, w| w.txeie().set_bit())
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},
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Event::Idle => {
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self.usart.cr1.modify(|_, w| w.idleie().set_bit())
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},
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}
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}
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/// Stop listening for an interrupt event
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pub fn unlisten(&mut self, event: Event) {
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match event {
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Event::Rxne => {
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self.usart.cr1.modify(|_, w| w.rxneie().clear_bit())
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},
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Event::Txe => {
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self.usart.cr1.modify(|_, w| w.txeie().clear_bit())
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},
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Event::Idle => {
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self.usart.cr1.modify(|_, w| w.idleie().clear_bit())
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},
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}
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}
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}
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)+
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}
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}
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#[cfg(feature = "device-selected")]
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usart! {
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USART1: (usart1, usart1en, apb2enr),
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}
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#[cfg(any(
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feature = "stm32f030x8",
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feature = "stm32f030xc",
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feature = "stm32f042",
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feature = "stm32f070",
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))]
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usart! {
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USART2: (usart2, usart2en, apb1enr),
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}
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#[cfg(any(feature = "stm32f030xc", feature = "stm32f070xb"))]
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usart! {
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USART3: (usart3, usart3en, apb1enr),
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USART4: (usart4, usart4en, apb1enr),
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}
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#[cfg(feature = "stm32f030xc")]
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usart! {
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USART5: (usart5, usart5en, apb1enr),
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USART6: (usart6, usart6en, apb2enr),
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}
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// It's s needed for the impls, but rustc doesn't recognize that
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#[allow(dead_code)]
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#[cfg(feature = "device-selected")]
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type SerialRegisterBlock = crate::stm32::usart1::RegisterBlock;
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#[cfg(feature = "device-selected")]
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impl<USART> embedded_hal::serial::Read<u8> for Rx<USART>
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where
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USART: Deref<Target = SerialRegisterBlock>,
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{
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type Error = Error;
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/// Tries to read a byte from the uart
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fn read(&mut self) -> nb::Result<u8, Error> {
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// NOTE(unsafe) atomic read with no side effects
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let isr = unsafe { (*self.usart).isr.read() };
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Err(if isr.pe().bit_is_set() {
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nb::Error::Other(Error::Parity)
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} else if isr.fe().bit_is_set() {
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nb::Error::Other(Error::Framing)
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} else if isr.nf().bit_is_set() {
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nb::Error::Other(Error::Noise)
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} else if isr.ore().bit_is_set() {
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nb::Error::Other(Error::Overrun)
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} else if isr.rxne().bit_is_set() {
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// NOTE(read_volatile) see `write_volatile` below
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return Ok(unsafe { ptr::read_volatile(&(*self.usart).rdr as *const _ as *const _) });
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} else {
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nb::Error::WouldBlock
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})
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}
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}
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#[cfg(feature = "device-selected")]
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impl<USART> embedded_hal::serial::Write<u8> for Tx<USART>
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where
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USART: Deref<Target = SerialRegisterBlock>,
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{
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type Error = void::Void;
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/// Ensures that none of the previously written words are still buffered
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fn flush(&mut self) -> nb::Result<(), Self::Error> {
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// NOTE(unsafe) atomic read with no side effects
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let isr = unsafe { (*self.usart).isr.read() };
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if isr.tc().bit_is_set() {
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Ok(())
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} else {
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Err(nb::Error::WouldBlock)
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}
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}
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/// Tries to write a byte to the uart
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/// Fails if the transmit buffer is full
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fn write(&mut self, byte: u8) -> nb::Result<(), Self::Error> {
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// NOTE(unsafe) atomic read with no side effects
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let isr = unsafe { (*self.usart).isr.read() };
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if isr.txe().bit_is_set() {
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// NOTE(unsafe) atomic write to stateless register
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// NOTE(write_volatile) 8-bit write that's not possible through the svd2rust API
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unsafe { ptr::write_volatile(&(*self.usart).tdr as *const _ as *mut _, byte) }
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Ok(())
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} else {
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Err(nb::Error::WouldBlock)
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}
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}
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}
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#[cfg(feature = "device-selected")]
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impl<USART, TXPIN, RXPIN> Serial<USART, TXPIN, RXPIN>
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where
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USART: Deref<Target = SerialRegisterBlock>,
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{
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/// Splits the UART Peripheral in a Tx and an Rx part
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/// This is required for sending/receiving
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pub fn split(self) -> (Tx<USART>, Rx<USART>) {
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(
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Tx {
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usart: &self.usart as *const _,
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},
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Rx {
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usart: &self.usart as *const _,
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},
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)
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}
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pub fn release(self) -> (USART, (TXPIN, RXPIN)) {
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(self.usart, self.pins)
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}
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}
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#[cfg(feature = "device-selected")]
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impl<USART> Write for Tx<USART>
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where
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Tx<USART>: embedded_hal::serial::Write<u8>,
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{
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fn write_str(&mut self, s: &str) -> Result {
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use nb::block;
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let _ = s.as_bytes().iter().map(|c| block!(self.write(*c))).last();
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Ok(())
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}
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}
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